# Instructions

## Move instructions

 dreg = AR | AXn | AYn | MRn | MXn | MYn | SRn | SI | SE reg = AR | AXn | AYn | MRn | MXn | MYn | SRn | SI | SE | ASTAT | MSTAT | SSTAT | SB | PX | In | Mn | Ln | CNTR | IMASK | ICNTL | IFC | TXn | RXn
 reg = reg | constant ; [218x] reg[219x] dreg | In | Mn = DM(address) ; [218x] dreg[219x] reg = DM(In, Mn) | PM(In, Mn) ; dreg = IO(address) DM(address) = [218x] reg[219x] dreg | In | Mn ; DM(In, Mn) | PM(In, Mn) = [218x] dreg | constant[219x] reg | constant ; IO(address) = dreg

## ALU instructions

 condition = EQ | NE | GT | GE | LT | LE | NEG | POS | [NOT] AV | [NOT] AC | [NOT] MV | NOT CE
 xreg = AR | AXn | SRn | MRn yreg = AF | AYn
[ IF  condition ] AR | AF
or
NONE
=
 xreg  [+  yreg | constALU]  [+ C] ; xreg | yreg  +  1 ; xreg  [-  yreg | constALU]  [+ C - 1] ; xreg | yreg  -  1 ; yreg  -  xreg  [+ C - 1] ; -  xreg  [+  constALU]  [+ C - 1] ; -  xreg | yreg ; ABS  xreg | yreg ; xreg  AND  yreg | constALU ; xreg  OR   yreg | constALU ; xreg  XOR  yreg | constALU ; TSTBIT  n  OF  xreg ; SETBIT  n  OF  xreg ; CLRBIT  n  OF  xreg ; TGLBIT  n  OF  xreg ; NOT  xreg | yreg | 0 ; PASS  xreg | yreg | constPASS ;

## Shift instructions

 condition = EQ | NE | GT | GE | LT | LE | NEG | POS | [NOT] AV | [NOT] AC | [NOT] MV | NOT CE
 [218x] xreg = AR | MRn | SRn | SI [219x] xreg = AR | AXn | AYn | MRn | MXn | MYn | SRn | SI
 [ IF  condition ] SR = [SR  OR]  ASHIFT  xreg  (HI) | (LO) ; [SR  OR]  LSHIFT  xreg  (HI) | (LO) ; [SR  OR]  NORM    xreg  (HI) | (LO) ; [ IF  condition ] SE = EXP  xreg  (HI) | (LO) | (HIX) ; [ IF  condition ] SB = EXPADJ  xreg ; SR = [SR  OR]  ASHIFT  xreg  BY  n  (HI) | (LO) ; [SR  OR]  LSHIFT  xreg  BY  n  (HI) | (LO) ;

Shift operation:

1. Zero 40-bit input register.
2. Load the 16-bit xreg into either bits 15…0 (LO) or bits 31…16 (HI).
3. Shift left (+ive shift) or right (−ive shift) either n or SE bits.
4. Either SR ← result or SRSR OR result.